Investigación

Publicación (Conferencias y Seminarios)

An FPGA implementation of a flexible architecture for H.263 video coding

Garrido González, Matías; Sanz Álvaro, César; Meneses Chaus, Juan Manuel
Resumen:
In this paper the implementation of an H.263 base-line video coder on an FPGA-based platform is explained. The coder consists of a set of specialised processors for the main tasks (DCT, quantizations, motion estimation) and a RISC for the scheduling tasks. The design has been written in synthesizable Verilog and fully tested with hardware-software co-simulation using standard video sequences. Finally, the coder has been tested on a prototyping board with a RISC processor and an FPGA.
Año:
2002
Tipo de publicación:
Conferencias y Seminarios
ISBN:
0-7803-7300-6
DOI:
10.1109/ICCE.2002.1014027
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