Publication (Journal publications)

An FPGA implementation of a flexible architecture for H.263 video coding

Garrido González, Matías; Meneses Chaus, Juan Manuel; Sanz Álvaro, César; Jimenez, Marcos

Abstract:

The architecture and design of MVIP-2, a flexible and efficient proposal for implementing an H.263 video coder, is explained in this paper. The MVIP-2 architecture consists of a set of specialized processors for the main tasks (transforms, quantizers, motion estimation and motion compensation) and a RISC processor for the scheduling tasks. The MVIP-2 design has been written in synthesizable hardware description language (HDL) and fully tested with hardware-software co-simulation using standard video sequences. Finally, MVIP-2 has been prototyped onto a system based on an FPGA and a RISC.

Year:

2002

Type of Publication:

Journal publications

Journal:

Consumer Electronics, IEEE Transactions on

Volume:

48

Number:

4

Pages:

1056-1066

Month:

November

ISSN:

0098-3063

DOI:

10.1109/TCE.2003.1196439